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24 Cray T3E User’s Guide
3.5 Local memory hierarchy
The local four-level memory hierarchy of the processing elements is
shown in Figure 3.3. Nearest to the execution units are the registers.
Caches for instructions and data (ICACHE and DCACHE) are each of size
8 kB. The second-level cache, SCACHE (96 kB in total), is on the Alpha
chip. The fourth level of the memory hierarchy is the main (DRAM)
memory (128 MB).
Registers
and
functional
units
SCACHE
2nd level
cache
96 kB
streams
DRAM
memory
128 MB
ICACHE
instruction
cache
8 kB
DCACHE
data
cache
8 kB
Figure 3.3: The local memory hierarchy.
It takes 2 clock periods (cp) to start moving a value from the first level
data cache DCACHE to registers. The bandwidth is 16 bytes in a cp.
The size of the DCACHE is 8 kB, or 1024 words of 8 bytes. The cache
is divided into 256 lines of 32 bytes each. Each read operation allocates
one line in DCACHE for moving data from the 2nd level cache (SCACHE)
or the main memory. This means that four consecutive 64 bit words
are read at a time. Therefore, arrays should always be indexed using the
stride of one!
For example, if you have a loop which indexes array elements which
are 8 kB apart in memory, all the elements will be stored to the same
DCACHE position. Therefore the data has to be fetched from a lower
level of the memory hierarchy each time. This kind of memory reference
pattern slows down the program considerably.
The second level cache (SCACHE) is of size 96 kB. This cache is three-way
set-associative, which means that each location in the central memory
can be loaded to three different locations in the SCACHE. This mapping
is random and the programmer can not dictate it. Therefore, from the
programmer’s point of view, the SCACHE is actually of size 32 kB or a
third of the physical size.
Each part of the set-associative SCACHE is direct-mapped to the memory
in the same way as DCACHE is. You can fit 4096 words (each 8 bytes)
to each of the three parts of the SCACHE. The latency of SCACHE is 8 cp
for moving data to the DCACHE. The bandwidth is 16 bytes in a cp, or
- Cray T3E 1
- User’s Guide 1
- Cray T3E User’s Guide 3 3
- Contents 4
- Contents 5 5
- B Glossary 113 6
- Bibliography 118 6
- Index 120 6
- Introduction 7
- 1.2 Usage policy 8
- 1.3 Overview of the system 9
- 1.4 Programming environment 9
- 10 Cray T3E User’s Guide 10
- Chapter 1. Introduction 11 11
- 12 Cray T3E User’s Guide 12
- Using the Cray T3E at CSC 13
- 2.2 Files 14
- 2.3 Editing files 16
- 2.5 Executing in batch mode 17
- 2.6 More information 18
- The Cray T3E system 20
- 3.2 Distributed memory 21
- 3.3 Processing elements 21
- 3.4 Processor architecture 23
- 3.5 Local memory hierarchy 24
- 26 Cray T3E User’s Guide 26
- Processing Element 27
- I/O Controller 27
- Interconnection 27
- Network 27
- 3.9 File systems 28
- 3.10 Resource monitoring 29
- 30 Cray T3E User’s Guide 30
- 3.11 More information 31
- Program development 32
- 4.3.1 BLAS 34
- 4.3.2 LAPACK 34
- 4.3.3 BLACS 35
- 4.3.4 PBLAS and ScaLAPACK 35
- 4.3.5 Details 35
- 36 Cray T3E User’s Guide 36
- 4.6 More information 38
- Fortran programming 40
- 5.2 Basic usage 41
- 5.4 Compiler options 42
- 5.5 Optimization options 42
- 5.6 Optimizing for cache 44
- 5.7 Compiler directives 45
- 5.8 Fortran 90 modules 48
- 5.9 Source code preprocessing 49
- 5.10 More information 51
- C and C++ programming 52
- 6.2 The C compiler 53
- 6.3 Calling Fortran from C 54
- 6.4 C compiler options 55
- #pragma _CRI symmetric var 59
- #pragma _CRI unroll [n] 59
- 6.6 The C++ compiler 61
- 6.7 More information 61
- Interprocess communication 62
- 7.2.1 Format of the MPI calls 63
- 7.2.2 Some MPI routines 64
- 7.2.3 An example of using MPI 64
- 7.2.5 MPI data types 67
- 7.3.1 Using PVM on the T3E 68
- #include <mpp/shmem.h> 71
- INCLUDE ’mpp/shmem.fh’ 71
- 7.4.2 Data addresses 72
- 7.4.4 Reduction routines 74
- 7.4.6 Example of using SHMEM 76
- 78 Cray T3E User’s Guide 78
- 0:c= 10121416 78
- 1:c= 2468 78
- 80 Cray T3E User’s Guide 80
- Batch queuing system 81
- 82 Cray T3E User’s Guide 82
- # QSUB -l p_mpp_t=7000 82
- 8.3 Status of the NQE job 83
- 84 Cray T3E User’s Guide 84
- 8.4 Deleting an NQE batch job 86
- 8.5 Queues 86
- 8.6 More information 87
- Programming tools 88
- 9.2 Program Browser 89
- 9.3 Debugging programs 92
- 9.3.2 Examining core files 93
- 94 Cray T3E User’s Guide 94
- 9.4.1 MPP Apprentice 95
- 9.4.2 The appview command 98
- 9.4.3 PAT 98
- 9.5.1 The VAMPIRtrace library 100
- 102
- 9.5.3 More information 103
- Miscellaneous notes 104
- 10.1.3 The CPU clock timer 105
- 10.1.4 Example of timing 106
- 108 Cray T3E User’s Guide 108
- 10.4 More information 110
- About CSC 111
- 112 Cray T3E User’s Guide 112
- Glossary 113
- 114 Cray T3E User’s Guide 114
- Appendix B. Glossary 115 115
- Metacomputer Environment 116
- Bibliography 118
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