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CHAPTER 6. LAB TASK 4 - CUSTOM INSTRUCTIONS
6.3.2 Data Path
The data path unit should defined in the
or1200_vlx_dp
module, a stub can be found in
file or1200_vlx_dp.sv. The data path unit should contain all logic relevant for the
data manipulation needed. This unit will be responsible for aligning and merging the
incoming bits with the bits previously stored. Different solutions are possible, either
taking one or several clock cycles. This is basically a trade off between speed and
hardware. It is your task to implement this module of course in conjunction with how
you implemented the control unit.
6.3.3 Store Unit
The store unit should be defined in the
or1200_vlx_su
module, a stub can be found in
file or1200_vlx_su.sv. The store unit is responsible for storing a full bit vector to
memory. A suggested solution is to take a 32 bit word and store it to main memory
one byte at a time, doing the zero stuffing if necessary. Remember that a 0xF F byte
has to be stored as two bytes 0x F F 0x00.
It is of course faster to store the data to the memory 32 bits at a time but keep in
mind that nothing more than byte alignment is ensured by jpegfiles.
Important!
This is worth repeating, jpegfiles only ensures byte aligned data.
If you do not understand the implications of this, consult some one in the
course staff before starting to implement your VLX unit.
6.3.4 Multi Cycle Instructions
Some instructions might be multicycle instructions, your solution will need to stall
the processor at certain points, at least when the bit buffer is stored to memory. This
is done by setting the
stall_cpu_o
signal high in the
or1200_vlx_top
module. When
high it will stop the cpu from fetching new instructions. This is useful, and so used,
when executing an instruction with indeterminable execution time, such as writing or
reading from memory.
6.3.5 Instruction Details
Although a lot of information about how the instruction is supposed to work is given
in this lab manual you have to work out the finer details yourself. A good place to start
is to look into the jchuff.c file. Also all other place in the code surrounded by the
#ifdef HW_INST
(grep is a good tool) can be of interest. Also remember to design for
test, the more status you can view of your hardware when it is running for real, the
easier it will be for you to debug it if something fails.
6.4 Hardware Implementation
In this lab task you are supposed to construct much of the hardware yourself. You
have to modify a small part of the
or1200_lsu
module (Load Store Unit). Three special
purpose registers are already present in the VLX hardware, the
bit_reg
register,
the
bit_reg_wr_pos
register, and the
vlx_add_o
register. They are all mapped to the special
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