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CHAPTER 4. LAB TASK 2 - DESIGN A JPEG ACCELERATOR

4.4.2 The jpegtest application

This is the main test application we are going to use in the lab series. It will ﬁrst read a

raw picture from a ﬁle named testbild.raw, encode it to JPEG format and write it to

an output ﬁle which you specify on the command line. It will also output performance

data on how many clock cycles some important functions consumed. In order to see

the encoded image you can place it in the /mnt/htdocs directory and download it to

your computer via the web server on the µClinux machine.

Laboration task 8

Download and test the jpegtest application. Both with and without the

testbild.raw

program.

4.4.3 The webcam application

The lab skeleton also includes a simple webcam application. You can download

webcam.cgi to /mnt/htdocs/cgi-bin and look at the webcam via the web browser.

Laboration task 9

Modify jpegﬁles to use your 2D DCT hardware and test it by using

jpegtest

and

webcam.cgi

. The results should be exactly the same as if you were using the software

only version.

4.5 Timestamps

The size of the test image wunderbart.jpg is 512 × 400 pixels, or 64 × 50 8 × 8-

blocks. The Figure 4.3 shows the result of collecting timestamps in the beginning of

block row 50.

The order of the operations is

1. read a block from DRAM (w/o DMA)

2. calculate DCT on the block (w/o HW DCT)

3. quantize the block (w/o HW Quantization)

4. readout of the block

5. Huffman encoding of the block (w/o special instruction)

In Figure 4.3 we have implemented all the HW accelerators except the quantization

step. It is evident that the design will gain a lot from the acceleration of the quantization

step. Putting more work into the DCT-accelerator is wasted hardware. The DCT-

accelerator will always be overlapped by (typically) the Huffman encoding.

Timestamps can be collected by using

timestamp = gettimer();

gettimer is a macro deﬁned in perfctr.h in jpegfiles.

The completion of the HW DCT operation can not be determined by software.

Instead you can include a 10-bit counter (for instance) in the accelerator. The counter

can be mapped into the free bits of the control register.

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Cypress DCT-1D Guía de usuario Pagina 50