Cypress CY62158EV30 Manual de usuario Pagina 47
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1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
Document Number: Rev
SheetDate: of
7/21/2009
12
B
Designer:
Drawn by:
Approved:
Drawing Title:
Page Title:
Size
Arnaldo Cruz
Arnaldo Cruz
*
0001
FLASH / SRAM / LCD IF board for DK-LM3S9B96
FLASH, SRAM
B
108 Wild Basin Rd.
Suite 350
Austin, TX 78746
TI AEC - Austin
Revision History
Revision
A 5/29/2009
Released for manufacturing.
Date Description
3.3V
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MA16
MA17
MA18
MAD0
MAD1
MAD2
MAD3
MAD4
MAD5
MAD6
MAD7
R2 10K
PG0/EPI13
PG1/EPI14
PH7/EPI27
PJ0/EPI16
PD3/EPI21
PD2/EPI20
PJ6/EPI30
PJ5/EPI29
PJ4/EPI28
PJ3/EPI19
PE3/EPI25
PE2/EPI24
PB4/EPI23
PB5/EPI22
PJ1/EPI17
PH0/EPI6
PH1/EPI7
PH2/EPI1
PH3/EPI0
PH4/EPI10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
2526
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
J1
DF12A-50DS
PC4/EPI2
PC5/EPI3
PC6/EPI4
PC7/EPI5
PG7/EPI31
PJ2/EPI18
PF5/EPI15
PF4/EPI12
PE1/EPI9
PE0/EPI8
PH5/EPI11
PH6/EPI26
3.3V
3.3V5V
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MA16
MA17
MA18
MA19
MA20
MA21
MA22
MA23
MA24
MA25
MA26
MAD0
MAD1
MAD2
MAD3
MAD4
MAD5
MAD6
MAD7
TP7
3.3V
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MA16
MA27
TP8
ALE
R1 0
C4
0.1uF
C5
0.1uF
C1
0.1uF
3.3V
C10
0.1uF
R5 2.80k
3.3V
R6 2.80k
I2CSCL
I2CSDA
MA19
MA20
MA21
MA22
MAD0
MAD1
MAD2
MAD3
MAD4
MAD5
MAD6
MAD7
A0
5
DQ0
9
A1
4
A2
3
A3
2
A4
1
A5
44
A6
43
A7
42
A8
39
A9
28
A10
27
A11
26
A12
25
DQ1
10
DQ2
13
DQ3
14
DQ4
31
DQ5
32
DQ6
35
DQ7
36
A13
24
A14
23
A15
22
A16
21
A17
20
WE
17
OE
41
CE1
6
VSS
12
VSS
34
VCC
11
8Mbit
CE2
40
NC
7
NC
8
NC
15
NC
16
NC
29
NC
30
NC
37
NC
38
A19
18
A18
19
VCC
33
U2
CY62158EV30
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
3.3V
C12
0.1uF
MAD0
MAD1
MAD2
MAD3
MAD4
MAD5
MAD6
MAD7
MA17
MA18
MA19
MA26
MA27
MA27
EPI I/F
3.3V
R4
10K
C11
0.1uF
Decode Table
Device
FLASH 0X
MA[27:26]
SRAM
LCD
10
11
GND
10
VCC
20
D1
3
D2
4
D3
7
D4
8
D5
13
D6
14
D7
17
D8
18
Q1
2
Q2
5
Q3
6
Q4
9
Q5
12
Q6
15
Q7
16
Q8
19
OE
1
LE
11
U3
74LVC373
Flash memory
SRAM memory
LCD Latch/Port
Description
MAD[7..0]
MA[27..0]
MAD[7..0]
MA[27..0]
MOEn
MWEn
MOEn
MWEn
MWEn
MOEn
F_RSTn
R3
10K
3.3V
ALE
A0
1
A1
2
A2
3
SDA
5
GND
4
SCL
6
WP
7
VCC
8
1K - 128X8
U5
CAT24C01
FLASH
SRAM
Note: R1 is not fitted
B 7/17/2009
Changed J2 to top entry, moved to bottom. Added R9-R11.
A0
25
DQ0
29
A1
24
A2
23
A3
22
A4
21
A5
20
A6
19
A7
18
A8
8
A9
7
A10
6
A11
5
A12
4
DQ1
31
DQ2
33
DQ3
35
DQ4
38
DQ5
40
DQ6
42
DQ7
44
A13
3
A14
2
A15
1
A16
48
A17
17
RDY
15
WE
11
OE
28
CE
26
VSS
27
VSS
46
VCC
37
64Mbit
BYTE
47
DQ8
30
DQ9
32
DQ10
34
DQ11
36
DQ12
39
DQ13
41
DQ14
43
DQ15/A-1
45
RP
12
A18
16
A19
9
A20
10
A21
13
VPP/WP
14
U1
S29GL064N
Flash, SRAM
- User’s Manual 1
- Copyright 2
- Table of Contents 3
- 4 September 5, 2010 4
- List of Figures 5
- List of Tables 6
- CHAPTER 1 7
- 8 September 5, 2010 8
- September 5, 2010 9 9
- Development Kit Contents 10
- Block Diagram 11
- 12 September 5, 2010 12
- Hardware Description 13
- CHAPTER 2 13
- Clocking 14
- Power Supplies 15
- Debugging 16
- Color QVGA LCD Touch Panel 17
- Control Interface 18
- Backlight 18
- Resistive Touch Panel 18
- User Switch and LED 19
- 20 September 5, 2010 20
- Peripheral Interface (EPI) 21
- CHAPTER 3 21
- 22 September 5, 2010 22
- CHAPTER 4 23
- 24 September 5, 2010 24
- Schematics 25
- APPENDIX A 25
- Schematic page 1 26
- Schematic page 2 27
- Schematic page 3 28
- Schematic page 4 29
- SDRAM Expansion Board 30
- EPI Signal Breakout Board 30
- Schematic page 6 31
- 32 September 5, 2010 32
- Component Locations 33
- APPENDIX B 33
- 34 September 5, 2010 34
- Center Positive (+) 35
- 36 September 5, 2010 36
- APPENDIX D 37
- 40 September 5, 2010 40
- Expansion Board 41
- APPENDIX E 41
- 42 September 5, 2010 42
- Remove board 42
- Remove jumpers 42
- 44 September 5, 2010 44
- Memory Map 45
- Flash, SRAM 47
- LCD Interface 48
- LCD_DECODE CPLD 48
- APPENDIX F 49
- Installation 50
- Using the Widget Interface 53
- Register Descriptions 55
- System Control Register 56
- Interrupt Enable Register 57
- Interrupt Status Register 57
- Memory Page Register 58
- Test PadRegister 58
- LCD Control Register 58
- 60 September 5, 2010 60
- Memory Port Register 61
- Memory Window Register 61
- Installing the Software 62
- Modifying the Default Image 62
- Default FPGA Image Blocks 62
- EPI Signal Descriptions 63
- EPI, LCD, Camera I/F 66
- SRAM, Power, JTAG 67
- Tactile Switch 67
- 68 September 5, 2010 68
- APPENDIX G 69
- Male EPI expansion connector 71
- Bottom side of EM2 module 71
- 72 September 5, 2010 72
- EM2 Expansion Board 78
- References 79
- APPENDIX H 79
- 80 September 5, 2010 80
- IMPORTANT NOTICE 81
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