Cypress CY7C1294DV18 Manual de usuario descargar pdf (Pagina 2)

CY7C1292DV18

CY7C1294DV18

Document #: 001-00350 Rev. *A Page 2 of 23

Logic Block Diagram (CY7C1292DV18)

CLK

A

(17:0)

Gen.

K

K

Control

Logic

Address

Register

D

[17:0]

Read Add. Decode

Read Data Reg.

RPS

WPS

Q

[17:0]

Control

Logic

Address

Register

Reg.

Reg.

Reg.

18

18

18

36

18

BWS

[1:0]

V

REF

Write Add. Decode

18

A

(17:0)

18

C

C

18

256K x 18 Array

256K x 18 Array

Write

Reg

Write

Reg

CQ

CQ

18

DOFF

Logic Block Diagram (CY7C1294DV18)

CLK

A

(16:0)

Gen.

K

K

Control

Logic

Address

Register

D

[35:0]

Read Add. Decode

Read Data Reg.

RPS

WPS

Q

[35:0]

Control

Logic

Address

Register

Reg.

Reg.

Reg.

36

17

36

72

36

BWS

[3:0]

V

REF

Write Add. Decode

36

A

(16:0)

17

C

C

36

128K x 36 Array

128K x 36 Array

Write

Reg

Write

Reg

CQ

CQ

36

DOFF

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