CY14B101LPRELIMINARY
Document #: 001-06400 Rev. *E Page 14 of 18
Figure 5. OE
-Controlled Software STORE/RECALL Cycle
[17]
Figure 6. Hardware STORE Cycle
Figure 7. Soft Sequence Processing
[19, 20]
Switching Waveforms (continued)
t
RC
t
RC
ADDRESS # 1 ADDRESS # 6
ADDRESS
t
SA
t
SCE
t
GLAX
t
STORE
/ t
RECALL
DATA VALID
DATA VALID
HIGH IMPEDANCE
CE
OE
DQ (DATA)
a
a
a
a
a
a
a
a
a
a
a
a
a
a
t
GHAX
t
HLHX
t
STORE
t
HLBL
t
DELAY
DATA VALID
DATA VALID
HIGH IMPEDANCE
HIGH IMPEDANCE
HSB (IN)
DQ (DATA OUT)
HSB (OUT)
a
a
a
a
a
a
a
a
a
a
ADDRESS # 1
ADDRESS # 6
ADDRESS # 1
ADDRESS # 6
Soft Sequence Command
t
SS
34
Soft Sequence Command
t
SS
34
ADDRESS
V
CC
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