Cypress CY14B108L Manual de usuario descargar pdf

ADVANCE

CY14B108L, CY14B108N

8-Mbit (1024K x 8/512K x 16) nvSRAM

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

Document Number: 001-45523 Rev. *A Revised June 24, 2008

Features

■ 20 ns, 25 ns, and 45 ns access times

■ Internally organized as 1024K x 8 (CY14B108L) or 512K x 16

(CY14B108N)

■ Hands off automatic STORE on power down with only a small

capacitor

■ STORE to QuantumTrap

nonvolatile elements initiated by

software, device pin, or AutoStore

on power down

■ RECALL to SRAM initiated by software or power up

■ Infinite read, write, and recall cycles

■ 200,000 STORE cycles to QuantumTrap

■ 20 year data retention

■ Single 3V +20%, –10% operation

■ Commercial and industrial temperatures

■ 48-pin FBGA, 44 and 54-pin TSOP II packages

■ Pb-free and RoHS compliance

Functional Description

The Cypress CY14B108L/CY14B108N is a fast static RAM, with

a nonvolatile element in each memory cell. The memory is

organized as 1024K words of 8 bits each or 512K words of 16

bits each. The embedded nonvolatile elements incorporate

QuantumTrap technology, producing the world’s most reliable

nonvolatile memory. The SRAM provides infinite read and write

cycles, while independent nonvolatile data resides in the highly

reliable QuantumTrap cell. Data transfers from the SRAM to the

nonvolatile elements (the STORE operation) takes place

automatically at power down. On power up, data is restored to

the SRAM (the RECALL operation) from the nonvolatile memory.

Both the STORE and RECALL operations are also available

under software control.

- A

Address

CAP

DQ0 - DQ7

HSB

CY14B108L

BHE

BLE

Logic Block Diagram

[1]

CY14B108N

Note

1. Address A

- A

and Data DQ0 - DQ7 for x8 configuration, Address A

- A

and Data DQ0 - DQ15 for x16 configuration.

[+] Feedback

1 2 3 4 5 6 ... 19 20

CY14B108L, CY14B108N 1
DQ0 – DQ15 3

Indice de contenidos

Pagina 1 - CY14B108L, CY14B108N

ADVANCECY14B108L, CY14B108N8-Mbit (1024K x 8/512K x 16) nvSRAMCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-9

Pagina 2

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 10 of 20AutoStore or Power Up RECALLParameters DescriptionCY14B108L/CY14B108NUnitMi

Pagina 3 - DQ0 – DQ15

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 11 of 20Figure 6. SRAM Read Cycle #2: CE and OE Controlled[10, 21, 23] Figure 7.

Pagina 4

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 12 of 20Figure 8. SRAM Write Cycle #2: CE Controlled[13, 21, 22, 23] Figure 9. Au

Pagina 5

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 13 of 20Figure 10. CE Controlled Software STORE/RECALL Cycle[17] Figure 11. OE Co

Pagina 6

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 14 of 20Figure 12. Hardware STORE Cycle[20] Figure 13. Soft Sequence Processing[1

Pagina 7

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 15 of 20Ordering InformationSpeed(ns)Ordering CodePackageDiagramPackage TypeOperati

Pagina 8

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 16 of 20Part Numbering Nomenclature45 CY14B108L-ZS45XCT 51-85087 44-pin TSOP II Com

Pagina 9

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 17 of 20Package Diagrams Figure 14. 44-Pin TSOP II (51-85087)MAXMIN.DIMENSION IN M

Pagina 10

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 18 of 20Figure 15. 48-ball FBGA - 6 mm x 10 mm x 1.2 mm (51-85128)Package Diagrams

Pagina 11

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 19 of 20Figure 16. 54-Pin TSOP II (51-85160)Package Diagrams (continued)51-85160-

Pagina 12

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 2 of 20Pinouts Figure 1. Pin Diagram - 48 FBGA Figure 2. Pin Diagram - 44/54 TSOP

Pagina 13

Document Number: 001-45523 Rev. *A Revised June 24, 2008 Page 20 of 20AutoStore and QuantumTrap are registered trademarks of Simtek Corporation. All p

Pagina 14

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 3 of 20Pin DefinitionsPin Name IO Type DescriptionA0 – A19Input Address Inputs Used

Pagina 15

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 4 of 20Device OperationThe CY14B108L/CY14B108N nvSRAM is made up of twofunctional c

Pagina 16

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 5 of 20Software STORETransfer data from the SRAM to the nonvolatile memory with aso

Pagina 17

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 6 of 20Preventing AutoStoreThe AutoStore function is disabled by initiating an Auto

Pagina 18

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 7 of 20Maximum RatingsExceeding maximum ratings may impair the useful life of thede

Pagina 19

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 8 of 20AC Test ConditionsInput Pulse Levels ....

Pagina 20

ADVANCECY14B108L, CY14B108NDocument Number: 001-45523 Rev. *A Page 9 of 20AC Switching Characteristics In the following table, the AC switching charac

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